1. Field of the Invention
The present invention relates to a serial access memory, and particularly to transfer units set as paths used when data stored in memory cells are respectively transferred to read and write registers.
2. Description of the Related Art
Each of memory blocks of a serial access memory adopts a configuration wherein read registers and write registers are respectively added to memory cells of a DRAM. The memory capacity of such a memory block is normally taken up or configured in units of 256 Kbits or 512 Kbits, for example to ensure an operating margin for each memory and reduce the peak of current consumption. Since the serial access memory often deals with image data, it needs to have a capacity of a few Mbits. In order to implement it through the, use of the above memory block, the serial access memory is made up of a plurality of memory blocks.
With the recent scale-down technology, the memory cell can be formed greatly by shortening it. However, the read registers and write registers are not scaled down in a manner similar to the memory cells. Thus, although the occupied area of each memory cell in a memory block is reduced, the read registers and write registers are not so scaled down. Accordingly, a problem arises in that the serial access memory has not yet been scaled down in chip size as might be expected. Further, since the conventional serial access memory comprises the plurality of memory blocks including the write and read registers, circuits for controlling the respective registers and transfer units increase in number, thus increasing current consumption.